Data Requirements and Goals of Floorplanning

 Till now, we have seen an overview of floorplanning and also talked little about the overview of partitioning. Today, we are going to discuss the about the actual floorplan requirement in the design.

 

As we have the idea of floorplan is the art of physical design. If floorplan is good, then we will face fewer difficulties throughout the design.

As we discussed earlier is that after the circuit partitioning phase, means the entire design divide into blocks and sub-blocks, the actual floorplanning of the layout starts. In the floorplanning, we have to estimate the area which can be utilities by the blocks and sub-blocks. In addition, the netlist specified connection must also be available.

Now, to start floorplan we need to be some required information from a various team such as RTL Design team and Architecture Design Engineers team.

Information from Architecture Design Engineers team:

• Block diagram of chip 
• Pin information 
• Data flow diagram 
• Gate count 
• Die area and Aspect ratio 
• Shape of blocks 
• Routing consideration at chip and block-level 
• Pre-placed block (in some cases) 
• IO placement information 
• Package Information

Information from RTL Design Engineers team:

• Netlist Instance naming convention (e.g. Pin or route name) 
• Voltage domain 
• Clock domain 
• Scan chain related information 
• Pin orientation and connection guidelines 
• Macros orientation guidelines 
• Test Pin related information 
• Over the Cell routing restriction information

The goals of Floorplanning are to:

• Arrange the block at a chip level 
• Decide the location of IO pads 
• Decide the location and number of power pads 
• Create core contiguous area for standard cell placement decide the type of power distribution 
• Decide the position of Macros and spacing between them

The objectives of floorplanning are to:

• Minimize the chip area 
• Improve the performance by reducing delay 
• Make the design routability easy

 

 

At this note of discussion, I wrapped this topic and we will meet soon with a new topic of floorplanning. Thank you. Have a nice day!!!