Partitioning

Partitioning!! The first step to move for the design. Today we are going to take look or we can say, an overview of partitioning for smooth understanding further topics. Here, we go ……….

The chip consists of a complex logical design. Write the RTL code, synthesis and draw the layout for the entire chip is a tedious job. So, engineers come with a solution is that cut the design into the small-small block and it will help the designer to do his/her job.

Any complex design necessitated decomposition of same into a set of smaller sub-systems in order make design efficient.

What is partitioning?

• Decomposition of a complex system (design) into the small subsystem. 
• Each subsystem can be designed independently. 
• Decomposition of the system ensures minimization the interconnection between subsystem. 
• Decomposition is carried out hierarchically until each subsystem is of manageable size.

Partitioning can be performed at the RTL level when the entire design partition into small blocks. All these blocks are linked together in the main module called TOP Module. Such partitioning is called Logical Partitioning.

Figure: Flow of Partitioning

Need for partitioning

• Partition a netlist into groups in order to minimize connection. 
• It will provide a good quality of placement and routing. 
• Chip performance depends on interconnect and so, we need to reduce interconnection among blocks. 
• It helps to reduce the chip area.

Partitioning plays a vital role in the design because techniques bring the design in the number of folds and we will be working on it parallelly. A design consists of millions of transistors and partition of design into a subsystem design called a block. Each block has terminals located at the boundary of block and connection of these block specifies into the netlist.

Goals of Partitioning:

• Reduce the cut-size. 
• Minimize the delay in critical paths. 
• Timing constraints have to be satisfied.

A design is partitioned at several levels due to its complexity. There are three types of partitioning:

• System Level Partitioning 
• Board Level Partitioning 
• Chip Level Partitioning

*Figure: Types of Partitioning

Guidelines for Partitioning*

A good logical partitioning leads to a successful synthesis and subsequently well-performing chip.

• Keep related combination together in the single module. 
• Functionality-wise separate modules. 
• Separate structural logic from random logic. 
• Keep the block size reasonable. 
• For each block, separate IO pads, boundary logic, core logic. 
• Avoid multiple clocks within a block. 
• Keep aside block which are utilize for synchronizing multiple clocks. 
• Keep a separate state machine from other logic. 
• Partition for design reuse.

There is the number of algorithms associated with partitioning such as Constructive algorithm and Iterative algorithm. But we are not going to discuss these algorithms here.

*References  

At this note of discussion, I wrapped this topic and we will meet soon with the topic of Floorplan. Thank you. Have a nice day!!!!