Floorplanning: concept, challenges, and closure
Floorplanning: concept, challenges, and closure
By Kushagra Khorwal Naveen Kumar Sonal Ahuja
A typical SOC can include many hard- and soft-IP macros, memories, analog blocks, and multiple power domains. Because of the increases in gate count, power domains, power modes, and special architectural requirements, most SOCs these days are hierarchical designs. The SOC interacts with the outside world through sensors, antennas, displays, and other elements, which introduce a lot of analog component in the chip. All of these limitations directly result in various challenges in floorplanning.
Disclaimer
I do not own the copyrights of the images and content of this article which is under the heading of News Articles. All credits go to the respective owner of the contents. I am just providing it at my blog for a single source of information.
Comments
Post a Comment
If you any doubt, please let me know