Floorplanning: concept, challenges, and closure

Floorplanning: concept, challenges, and closure

By Kushagra Khorwal Naveen Kumar Sonal Ahuja




As we have about the floorplan in our various post, this article will help you to firm your concept.


A typical SOC can include many hard- and soft-IP macros, memories, analog blocks, and multiple power domains. Because of the increases in gate count, power domains, power modes, and special architectural requirements, most SOCs these days are hierarchical designs. The SOC interacts with the outside world through sensors, antennas, displays, and other elements, which introduce a lot of analog component in the chip. All of these limitations directly result in various challenges in floorplanning.


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