LEF File
There
are some files other than Design Setup files while will be generated during the
Physical Design process. Such files are used to recreate the design or store design
data as per the designer convenience.
LEF File
- Library Exchange Format is representing layout information on components of an IC.
- It is represented ASCII format and it is readable.
- It represents all required information for PNR of the components without the need to include the full physical design layout [of block or chip].
- Along with this, it stores some technology information on conducting layers and via layers.
- The file is required at the time of design import in place and route.
- LEF is also called physical library as it contains layout information of a cell in abstract view. LEF file comes with standard cell library.
- LEF file is describing library has two-part:
- Technology LEF contains the information of metal layers, via information, metal capacitance, and design rules.
- Cell LEF contains the information related to the geometry of each cell in abstract view. It doesn’t contain Frond end of line (FEOL) layer information (e.g. poly, diffusion, etc.).
In short, the LEF file is
an abstract view of cells. It only gives an idea about PR boundary, pin position
and metal layers information of cells. If we want complete information about
the cell, then we required to generate the DEF file of the cell.
At
this note of discussion, I wrapped this topic and we will meet soon with a new topic
of Design Setup. Thank You, Have a nice day!!!
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