Types of Timing Analysis

Hi readers, today, we are going to discuss the most important topic of physical design is Static timing analysis. Under STA, we will discuss each and every part of STA. Today, we start with types of timing analysis.

Here, first, we discuss a few questions such as what is STA? Is any other method available to verify the timing of design? Why is only STA? Why not another method? And many more. To answer those question, we have to go through the topic and here we go………..

In micron and deep sub-micron technologies, the design has represented as netlist and we perform all physical design. But, whether the design working or operate within a specific frequency or not. How can we check the timing of the design? For that purpose, worst-case, we need to perform a timing analysis of the design. Few other reasons for why? Analyze the design netlist to determine worst-case delay path, so we can predict maximum clock frequency. We have to carry out timing optimization so that design can run faster and try to get high performance.

There are two types of timing analysis:

1. Dynamic timing analysis
2. Static timing analysis

Dynamic Timing Analysis 

DTA is a kind of timing analysis technique where we check both timing and functionality of the design. To analyse the design in DTA, we need SPICE model to simulate transistor circuit and input vectors to simulate the design and get the result. But in design which possesses a large number of transistors i.e. inputs to design is more. To generate the combination of such inputs takes months and months. Also, to perform DTA, we need function and timing model for each gate used in the design. The functionality and timing model are present in a standard format called liberty.

Consider a design under analysis which has 16 inputs, to analyse the timing in DTA, we need 2¹⁶ combinations.   It means we required 65,536 input vector combination to verify. Now think about design which has more than 100 inputs. It will need 2¹⁰⁰ input vectors to simulate the design. Along with timing, DTA also analyses the functionality, the analysis will take more time than months. That’s why we cannot use DTA for timing analysis.

Key Points:

• DTA gives very accurate result. 
• Verify both timing and functionality. 
• It is good for a small design.

Limitations:

• DTA required input vectors. 
• Quality of design is depended on how wisely input vectors are generated. 
• It is a slow  technique to analyse the design. 
• It is not suitable for a large design.

Static Timing Analysis 

STA is a kind of timing analysis technique where we check whether a design meets its performance goals, which are normally expressed in terms of maximum propagation delay or minimum operating frequency. To perform STA, we need timing models.

Key Points:

• STA refers to the process used to verify the timing of design without the need of input vectors. 
• Here, we cannot check the functionality of the design. 
• It is suitable for a large design. 
• It is a fast and exhaustive process. 

Limitations:

• STA cannot verify functionality. 
• The result of STA is pessimistic. 
• It has timing exception and we have to deal with it before start of the analysis. 
• It cannot handle asynchronous design. 
• It should not track an unknown value X in the design. 
• STA should not check the correctness of clock synchronizer. 
• It doesn’t deal with analogue blocks.   

Despite such issues, STA is widely used across the semiconductor industries to verify the timing of the design and the simulation is used as a backup to check corner cases and modes of the design.

 

At this note of discussion, we wrap up this topic briefly and we will meet soon with a new post - “Introductionto STA”. Thank you, Have a nice day!