Placement

Today, we are going to see an overview of Placement stage and goals. And here, we go…………...........  

Placement is a key step in physical design. Placement is the process of placing standard cells between power rail which is created at the floorplanning stage.

Placement is decided whether the design is routable or not. The placement also determines routability of the design.  A poor placement consumes more area utilization, shows more congestion which may hardly resolve, and degraded performance.

Figure: Placement of Standard Cells

In the placement stage, EDA tool places and optimizes design in proper placement flow. First, the tool performs coarse placement of cells which placed the cells randomly in the contiguous core area. Second, the tool tries to fix logical DRCs and High Fanout Synthesis. Third, it performs timing driven placement follows the optimization. Finally, along with optimization, tool legalized the cells. Legalization of cells refers to place the cells in the power rails without any overlapped of it.

Placement of standard cell in a key factor for achieving the goal of physical design with optimized area usage, routing congestion, and timing behaviour. Today, every EDA tool use various placement algorithm to place standard cell automatically which are very complex and used frequently. But the basic idea has remained the same.

The goal of Placement: 

• Area and Power Optimization 
• Timing Optimization 
• Fixing Logical DRC 
• Minimal Acceptable Congestion  
• Routable Design  

  

In placement stage, there are a lot of things to discuss such as input and output to placement, fixing of timing and logical DRC, Two-pass synthesis, congestion minimization, High fanout synthesis and many more. We will discuss all these topics in my upcoming posts.

 

 

At this note of discussion, I take a leave and we will meet with a new topic of the Placement. Thank you. Have a nice day!!