SDC File
Today, we are going to take
a look at one of the important design setup file named as SDC. SDC file defines
timing constraints of the design. Here, we go…………….
Synopsys Design Constraints
(SDC) file is used to define or specify the timing constraints of the design. The
file is used by all company to specify the timing constraint of the design. It
is a kind of recommended methodology which is given by Synopsys.
SDC file is a text file
and a TCL based format i.e. all commands follows the TCL syntax. It can be also
created by the program. Its provide timing, area and power constraints of the
design. It acts as a communicator between the EDA tool and required design
intents.
When we perform Synthesis
and PNR, we need to provide the design constraints to Synthesis and PNR tools in
form of SDC file. The single SDC file is used at Synthesis and PNR stage.
SDC file is provided by Synthesis team. The document of design specification is specify the constraints. Any updates and suggestion given by PNR designer, we must have report to the synthesis team.
We can generate the SDC
file at the end of the Synthesis stage and PNR stage by using simple command write_sdc
in the EDA tool.
In the SDC file, we specify
the following parameters
- Timing Constraints and Timing Exceptions
- Design Environment in terms of modes and scenarios, and Logical DRCs
- Multi-voltage domain
The SDC file format from
a book is available in the public domain.
SDC File Format, click here.
Source: Springer, original
link, click here.
At this note of discussion,
we wrapped this topic and if you want something more related to SDC file,
command or design example, please let me inform in the commend section.
We will meet soon with a
new topic of Design Setup. Thank you. Have a nice day.
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