Routing

Today, we are going to discuss an overview of routing. It is the last stage of APR flow and we see the type of routing and goal. And here we go ………

 

Routing is the process after CTS where clock nets routed with high precision. At the CTS stage, clock nets are detailed routed with NDR rules along with no crosstalk, EM issues. Before we start the routing, clock nets must route with error-less DRC and LVS.

Figure: Interconnect Metal-tracks after Routing

Routing is the process of determining the actual path for nets to interconnect the pins of standard cell and macro on the design layout.  There are two types of routing global routing and detailed routing. 

Global routing is used to give a rough idea of the interconnection of metal tracks. 

Detailed routing is used to actual metal tracks lay down for nets to interconnect pins.

In routing there are Four basic steps – 

• Global Routing
• Track Assignment
• Detailed Routing 
• Search & Repair

The goal of the routing is the entire connectivity of design with minimum DRC violation and meet the timing constraints.

We will discuss more on each segment of the routing in detail in upcoming posts.

Once we are done with routing, we have to move for the design for manufacturability DFM. In DFM, designer improves the yield of the chip. If the designer does not work as per the DFM guidelines, then the yield of design will be poor. It doesn’t affect the performance of the chip directly, but the reliability of the chip will be gone over the short period of time. It will lead to the failure of the chip.

In DFM, we have to discuss on metal slotting, metal erosion, Antenna effect and many more. We will discuss more on DFM later under the heading of Sign-off Checks.

 

 

At this note of discussion, we wrapped the overview of routing and DFM. We will meet soon with more discussion on it. Thank you. Have a nice day!!