Design Style

Today we are going to discuss types of ASIC design and here we go…………

If we want to build a digital system, there are may of device technologies to choose, from field programmable chip [board] i.e.  FPGA to full custom devices. There is no single best technology where we can consider better trade-off among the various factors such as speed, power, area, performance, circuit delay, the time required to complete the design cycle and cost.

Factors on which design style depends –

• A large number of devices.
• The functionality of the chip.
• Optimization requirement for high performance.
• Time to market competition.
• The volume of a chip to be manufactured. Most important is cost.

Now, we see the types of ASIC design……

FPGA

Field programmable gate array is an integrated circuit which will be configured by a designer as per need of the application. The field programmable refer that designer can establish the connection using hardware code and dumped it into the chip. It can be erasable and same chip is ready to reprogram for the new application.

FPGA Design Flow: 

1. Design Entry: Write VHDL or Verilog code for particle schematic.
2. Implementation: Verify code using simulation. 
3. Dumped on the board: Configure the chip to perform the intended function.

Challenges:     

• It is not good for aggressive design specification. 
• It is ideal for small design but not good design where high performance and low power are hard constraints.
• It is no economical for a higher count of chip requirement.

Why FPGA based design flow?

• Speed 
• Cost
• Application
• Prototype and simulation
• Manufacturing and development tool

Full Custom Design

In full custom design, we have to develop a chip layout from starch means we have to draw layout even for transistor till the end of routing. Only the designer is responsible for the chip layout from floorplan to routing. We have complete control of the circuit and we have to draw transistor to meet performance goal. Unfortunately, designing a circuit at transistor-level is extremely complex and involved. Such designs are only feasible for smaller circuits.  Layouts of full customs are only masked for particular applications. The mask of design is required for every layer. During the process of fabrication, all layers have to be custom constructed, and nothing can be done in advance.

Challenges: 

• It gives a good performance but it is not feasible for a design where the count of transistors is high.
• It takes a long time to design.

Semi-custom Design

Semi-custom is a kind technique design in which layout is built by using the pre-existing cell such as memories(macros), logic cells(standard cells) as a primitive. That’s why it is also called a Standard Cell ASIC design.

Standard cells are predesigned and their layouts are validated and tested, then we used it to design layout of the chip, thus its simplified the design process. In this design technique, we get predesigned cell in the form of the library which will provide by the vendor.

Standard cell library is designed using full custom flow, examples, power cells, spare cells, feedthrough cells, physical cells, boundary cells, etc. Only the placement of standard cells and interconnect is done in this design flow. However, standard cells can be placed anywhere on the die.

Semi-custom design flow overcomes all problems encountered in FPGA and Full Custom design flow.

 

At this note of discussion, we wrap up this topic and we will meet soon with a new topic which is part of physical design. Thank you, Have a nice day!